[Allusers] CALL FOR PARTICIPATION in IEEE DDECS 2007
Gestor Rede DEEC/ISR
gestor at deec.uc.pt
Wed Mar 28 09:39:14 WEST 2007
-------- Forwarded Message --------
From: Tomasz Garbolino <Tomasz.Garbolino at polsl.pl>
To: DDECS 2007 <Tomasz.Garbolino at polsl.pl>
Subject: CALL FOR PARTICIPATION in IEEE DDECS 2007
Date: Tue, 27 Mar 2007 20:50:21 +0200
10th IEEE Workshop on
Design and Diagnostics of Electronic Circuits and Systems
DDECS 2007
11th-13th April, 2007
[]
Kraków, Poland
Collegium Novum, Jagiellonian University
http://www.iele.polsl.gliwice.pl/ddecs2007
http://ddecs.org/
C A L L F O R P A R T I C I P A T I O N
ABOUT DDECS
The IEEE DDECS workshops offer a forum for exchanging ideas, presenting
research
results and practical applications in the design, verification, test and
diagnosis
fields of electronic circuits and systems. Over the years, DDECS has
undergone healthy
growth, in terms of both the number of paper submissions and the number
of attendees.
It has now become one of the major scientific events organized in
Central Europe
in the area of design and test. This year we celebrate the 10th
anniversary
of the DDECS series of workshops.
ABOUT DDECS 2007
DDECS 2007 takes place in Kraków, one of the oldest and most beautiful
cities in Poland.
Workshop participants will meet in a historic building of Collegium
Novum at the famous
Jagiellonian University.
The workshop is organized under the honorary patronage of the Major of
the City of Kraków
by the Institute of Electronics of the Silesian University of
Technology, and is sponsored
by the IEEE Computer Society and Test Technology Technical Council
(TTTC).
WORKSHOP HIGHLIGHTS
The technical program consists of:
- three keynote speeches,
- 12 regular sessions with 40 paper presentations,
- 3 poster sessions composed of 33 regular and 3 student posters, as
well as
- special notes about IEEE Computer Society and TTTC activities, and
on FP7 initiatives from the European Commission.
Keynote presentations will be given by:
- Prof. Krishnendu CHAKRABARTY (Duke University) on "Design and Test of
Microfluidic Biochips"
- Prof. Daniel D. GAJSKI (University of California at Irvine) on "New
Strategies for System-Level Design", and
- Dr. Janusz RAJSKI (Mentor Graphics Corporation) on "Logic Diagnosis
and Yield Learning".
Regular sessions include:
- DfT & Defect Analysis
- SOC Design & Test
- Fault Analysis & Circuit Reliability
- FPGA-Based Design
- Memory Testing
- Logic Design
- Fault Tolerance I
- Analog & RF Design
- Fault Tolerance II
- Test Quality & Test Generation
- Model Checking & Debugging
- Analog & MEMS testing
Yervant Zorian (Virage Logic) IEEE TTTC (senior past chair) will present
IEEE Computer Society
and TTTC recent policies.
There will also be an address from the European Commission by Philippe
Reynaert from
the DG INFSO Embedded Systems unit on European Technology Platforms and
Joint
Technology Initiatives. A special session with Philippe Reynaert will
take place on Friday,
April 13th that will explain the potential for participation in the
ARTEMIS Technology Platform.
Two main sponsors of the event, namely Evatronix SA and Mentor Graphics
Corporation will present
their product strategies during the sponsors session.
SOCIAL ACTIVITIES
The DDECS workshop was always known for an excellent program of social
activities. In Krakow
we continue this tradition with Welcome Reception at City Hall, a
dinner at the famous Wierzynek
restaurant, a visit to the unique medieval Wieliczka Salt Mine, and a
banquet at Zalesie Folwark.
REGISTRATION
Please refer to DDECS 2007 web site at
www.iele.polsl.gliwice.pl/ddecs2007 for information
regarding the program, accommodation, accompanying events, and
registration.
Please, direct all inquiries concerning registration to
DDECS07-reg at ciel.pl.
Early registration is available until the end of March for those paying
with credit cards.
DDECS 2007 PROCEEDINGS
The DDECS proceedings are published with the IEEE Computer Society
copyright and hosted
in the IEEE digital library Xplore.
ACCOMPANYING EVENT - CCE 2007
DDECS 2007 will be accompanied by the CCE 2007 workshop on "Challenges
in Collaborative Engineering".
CCE 2007 will run in parallel to DDECS in the Collegium Maius of the
Jagiellonian University.
More information on CCE: http://cce.ecolleg.org/2007
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